1. Field of the Invention
The present invention relates to a method of manufacturing a capacitor used in DRAM (Dynamic Random Access Memory) suitable for preventing the problem of collapse of a lower electrode of the capacitor with a high aspect ratio.
2. Related Art
In manufacturing of semiconductor devices, various structures are formed on a semiconductor board, and with increases in packing density of the semiconductor device, there has been a tendency that the dimensions of the structure are decreased in the direction parallel with a surface of the board while being increased in the direction perpendicular to the surface. The ratio of the dimensions is called the aspect ratio, and indicates a ratio of the perpendicular dimension to the parallel dimension, i.e. a length-to-width ratio. Generally, as the aspect ratio is higher, the degree of difficulty is remarkably increased in manufacturing the semiconductor device. As a suitable example, there is a capacitor used in DRAM.
Referring to FIG. 1, a method will be described below of manufacturing a cylindrical capacitor lower electrode with a high aspect ratio in conventional techniques.
FIGS. 1(a) to 1(f) are a series of cross-sectional views showing an example of the conventional manufacturing method for forming a lower electrode of a capacitor on a semiconductor board.
FIG. 1(a) shows a cross-sectional view of process before forming deep holes that are regions to form capacitors.
Word lines 3 including gate electrodes are formed on a surface of a semiconductor board 1 on which predetermined device separation regions 2 are formed, via gate insulting films (that are extremely thin and not shown in the figure). Then, insulating films 6 comprised of silicon oxide, silicon nitride and the like are formed to cover the word lines 3. Further, drains 4 and sources 5 are formed in respective predetermined regions on the surface of the semiconductor board 1 to constitute transistors. First plugs 7 comprised of polysilicon are formed to connect to the sources 5 or drains 4. Each bit line 8 comprised of metal such as tungsten is provided on the plug 7 connected to the source 5. Further, a first interlayer insulting film 10 comprised of silicon oxide and the like is formed to cover the bit line 8, and the surface is once flattened. Meanwhile, each second plug 9 is formed in a predetermined region of the first interlayer insulating film 10 to connect to the plug 7 on the drain 4.
Next, a second interlayer insulating film is formed on the first interlayer insulating film 10 at which the surface of the second plug 9 is exposed in the predetermined region. The second interlayer insulating film is comprised of silicon nitride 11a with a thickness of about 50 nm and thick silicon oxide 11b with a thickness of about 2000 nm. A silicon film 12 with a thickness of 500 nm to be a hard mask is formed on the silicon oxide 11b, and a photoresist 13 is further formed thereon.
FIG. 1(b) shows a cross-sectional view of process up to formation of deep holes that are formation regions for capacitors.
A predetermined pattern is formed on the photoresist shown in FIG. 1(a) using a lithography method. Then, the silicon film 12 is dry etched using the patterned photoresist as a mask, and the pattern is transferred to the silicon film 12. Further, the silicon oxide 11b and silicon nitride 11a are dry etched using the patterned silicon film 12 as a mask to form the deep hole 14. The photoresist is also etched and vanishes for a period during which the deep hole is formed in the thick silicon oxide, it is thereby difficult to form a desired deep hole, and therefore, the silicon film is used as a hard mask. Further, the silicon nitride 11a is provided to prevent the first interlayer insulating film 10 from being etched unnecessarily in dry etching to form the deep hole in the silicon oxide. In consideration of the fact that the dimension of a short side of an opening of the deep hole is 200 nm and the thickness of the silicon oxide 11b is 2000 nm, the aspect ratio (length-to-width ratio of the deep hole) is about 10.
FIG. 1(c) shows a cross-sectional view of process up to formation of a silicon film 15 to be lower electrodes of capacitors.
After performing post-processing of dry etching used in formation of the deep holes, pre-cleaning is performed to remove a natural oxide film on the surface of the second plug 9, and then, the silicon film 15 with a thickness of 40 nm is formed. A mixed solution of ammonia and hydrogen peroxide or the like is used in the post-processing of dry etching. A solution containing hydrogen fluoride is used in removing the natural oxide film.
The silicon film 15 is formed using chemical vapor deposition (hereinafter, referred to as CVD) on conditions as described below. Used as a reactant gas is a mixed gas of monosilane (SiH4) and phosphine (PH3). PH3 is used as a source to introduce phosphorus as impurities to the silicon film so as to provide the film with conductivity. The reaction temperature is 530° C., and low pressure of about 100 Pa is used as reaction ambient pressure. The silicon film formed on the temperature condition is amorphous, and to provide the film with conductivity, heat treatment of about 700° C. is performed to activate the impurities after forming the film.
FIG. 1(d) shows a cross-sectional view of process up to formation of silicon oxide 16 on the entire surface including internal portions of the deep holes.
The silicon oxide 16 is formed by plasma CVD using as a reactant gas TEOS (tetraethoxysilane: Si (OC2H5)4) generally used as an organic material. It is possible to fill the deep holes by depositing the silicon oxide 16 to a thickness more than half the dimension of the short side of the opening of the deep hole as viewed on a plan view.
FIG. 1(e) shows a cross-sectional view of process up to removal of the silicon film 15 and silicon oxide 16 on the surface of the silicon oxide 11b. The removal is performed using CMP (Chemical Mechanical Polishing) or dry etching.
FIG. 1(f) is a cross-sectional view of process up to removal of the silicon oxide 11b and the silicon oxide 16 filled in the deep holes, and illustrates collapse of the exposed lower electrode.
The removal of the silicon oxide is performed using a solution at least containing hydrogen fluoride (HF). On the outside of each deep hole, since the silicon nitride 11a with high etching resistance exists even when all the silicon oxide 11b is removed, the first interlayer insulating film 10 as a base coating is not etched. However, on the inside of each deep hole, since silicon nitride does not exist at the bottom of the deep hole, when the solution penetrates the silicon film 15 to be an electrode, the first interlayer insulating film 10 situated under the silicon film 15 is etched unnecessarily. As a result, the problem arises that the silicon film 15 to be an electrode looses a base to support the film and collapses. This problem becomes more serious when the thickness of the silicon film to be a lower electrode is further decreased with progress in fine processing in semiconductor device.
JP 2003-297952 discloses a method of increasing the mechanical strength by adding a support structure to the lower electrode for the purpose of preventing the lower electrode from collapsing even when wet etching by solution is used as described above. However, this method requires addition of a plurality of new processes including lithography to complete formation of the entire deep hole because the support structure is provided at some midpoint of the deep hole, thus being significantly complicated.
In order to prevent the problem of collapse of the lower electrode occurring due to removal of silicon oxide using liquid as described above, it is desired to use dry etching that does not cause problems such as penetration of liquid, substituting for wet etching using liquid. However, the contribution of ions with high energy is indispensable in dry etching of silicon oxide, it is difficult to remove thick silicon oxide with the thickness of 2000 nm by dry etching without providing damage to the shape of the lower electrode in such a state that the lower electrode comprised of polysilicon is already formed inside the deep hole, and dry etching is thus not realistic.
JP H06-85171 discloses a method of using an organic substance as a substitute for silicon oxide as a thick support base material in forming the lower electrode. A deep hole is formed in the organic substance in the same way as the conventional method, and after the lower electrode is formed, only the organic substance is removed by dry etching without exerting effects on the other structures including the lower electrode. However, the organic substance used in this well-known example is photoresist or polyimide resin formed by rotation coating, and has a risk of polluting the semiconductor device. Further, the organic substance is extremely low in heat resistance, and has a defect of causing pattern deformation by thermal shrinkage. Accordingly, there is a problem that its application is difficult to manufacturing of products subsequent to current products having fine structures with the smallest processing dimension less than 130 nm.
As described above, the conventional capacitor manufacturing method has the steps of (1) forming a conductor plug surrounded by an insulating film on a semiconductor board, (2) depositing a thick oxide film on the plug and forming a deep hole in a predetermined region of the thick oxide film to expose the surface of the plug, (3) forming a conductor to be a lower electrode of the capacitor along the internal wall of the deep hole, (4) etching and removing the thick oxide film that is a support base material for the conductor using a solution containing hydrogen fluoride and forming the lower electrode with internal and external walls of the conductor exposed, and (5) forming a dielectric on the surface of the lower electrode and further laminating a conductor to be an upper electrode to form a capacitor. However, in the step of etching the thick oxide film using the solution containing hydrogen fluoride, the problem occurs that the insulating film that is a base of the conductor to be a lower electrode is etched unnecessarily and the lower electrode collapses. Therefore, adjacent lower electrodes come into contact with each other, thereby causing a bit failure, and the manufacturing yield is remarkably reduced.
In order to prevent the aforementioned problem, above-mentioned JP 2003-297952 discloses the method of coupling between lower electrodes with an insulating film to enhance the mechanical strength in order for the lower electrodes with the internal and external walls exposed not to collapse even when the thick oxide film is etched and removed using a solution. However, this method requires addition of a plurality of new processes including lithography, and produces side effects that manufacturing processes are made complicated and it becomes difficult to form the lower electrode structure with high precision.
Further, above-mentioned JP H06-85171 discloses the method of using an organic substance such as a photoresist to constitute a support base material as a substitute for the thick oxide film, removing the organic substance by dry etching and thereby preventing damage to the lower electrode. However, the organic substance such as a photoresist formed by rotation coating is low in heat resistance, causes pattern deformation due to ambient heat in forming the lower electrode, and makes it difficult to construct the lower electrode with a desirable shape.
Furthermore, JP H10-335592 discloses a method of using amorphous carbon as a material to embed between conductors for the purpose of forming an inductor excellent in high-frequency characteristics on a semiconductor board. The general outline is comprised of the steps of (1) coating surfaces of the conductor and amorphous carbon on an insulating film with an insulating film with air permeability, (2) providing heat treatment in an atmosphere of oxygen to vaporize the amorphous carbon by oxidation, and (3) removing vaporized amorphous carbon through the insulating film with air permeability. It is described therein that a series of steps enables formation of hollow space surrounded by the conductor and insulating film, less parasitic capacity, and formation of an inductor excellent in high-frequency characteristics.
In the aforementioned method, it is necessary to remove amorphous carbon through the insulating film in terms of the structure as disclosed. Further, for the removal through the insulating film, a process is required to diffuse oxygen or reaction products in the insulating film, and the contribution of thermal energy is indispensable to promote the diffusion. However, since adjacent conductors are comprised of metal poor in heat resistance and oxidation resistance, it is difficult to set high temperatures, and there arise problems of poor removal efficiency and lack of practical utility.